View JZ4725_650479.PDF datasheet online --- IC-ON-LINE

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5
4
3
2
1
VDDA
RREF
VREF
R1 RCLKO RESET_N VRTC RCLKO RCLK GND DP0 DM0 VDDUSB RREF VDDA GND VDDPLL GND VDDPLL VDDADC GND ADIN1 ADIN0 VDDHP VDDHP VDDIO R2 2.49K 1% 3.3V 3.3V
1.5K
C3
22pF 32.768K
C1 1uF
D
C2 1uF
GND L-HPO
R-HPO
R3 10M Y1 RCLK C4 22pF
D
GND
U1
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
VREF
GND
R4 XTAL
33 R5 1M
C5 Y2 12MHz
22pF
VSSDC2 VDDCDC2 VREF VDDCDC1 VSSDC VDDLHP PHLO PGND PHR0 VDDHP PWR_ON WKUEP/PD29 RESET VDDRTC RCLK0 RTCLK USBGND DP0 DM0 VDDUSB RREF VDDA PGND1 VDDPLL AGND2 AVDDPLL VDDADC AGND1 ADIN1 BAT/ADIN0 VDDIO EXCLK0
3.3V
L-LINEIN R-LINEIN MICIN R6 47K R7 47K
UBOOT
LCD_RST LCD_CS VDDIO LCD_SCL GND LCD_SDA LCD_VSYNC LCD_HSYNC LCD_DE
C
2
LCD_D17 D6
R26 1k
LCD_D0/PC0 LCD_PCLK/PC18 VSSA VDDCOREA A3/GPB3 A2/GPB2 A1/GPB1 A0/GPB0 A10/GPB10 DCS_N/GPB19 RAS/GPB20 CAS/GPB21 SDWE_N/GPB22 WEO_N/GBP31 WE1_N/GPC24 CK0/GPB24 CKE/GPB23 A12/GPB12 A11/GPB11 GND VDDCOREB A9/GPB9 A8/GPB8 VDDIO1 GND1 A7/GPB7 A6/GPB6 A5/GPB5 A4/GPB4 A13/GPB13 A14/GPB14 D8/GPA8
LCD_D17 LCD_D16 LCD_D15 LCD_D14 LCD_D13 LCD_D12 LCD_D11 LCD_D10 LCD_D9 LCD_D8 LCD_D7 LCD_D6 LCD_D5 LCD_D4 GND LCD_D3 LCD_D2 LCD_D1
97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
LINEIN_L LINEIN_R MICIN BOOT_SEL1 BOOT_SEL0 A22/SPL/GPB18 A21/CLS/GPB17 VDDIO2 A20/REV/GPC23 GND2 A19/PS/GPC22 LCD_VSYNC/PC20 LCD_HSYNC7/GPC19 LCD_DE/GPC21 LCD_D17/GPC17 LCD_D16/GPC16 LCD_D15/GPC15 LCD_D14/GPC14 LCD_D13/GPC13 LCD_D12/GPC12 LCD_D11/GPC11 LCD_D10/GPC10 LCD_D9/GPC9 LCD_D8/GPC8 LCD_D7/GPC7 LCD_D6/GPC6 LCD_D5/GPC5 LCD_D4/GPC4 GND3 LCD_D3/GPC3 LCD_D2/GPC2 LCD_D1/GPC1
JZ4725
EXCLK MCS_CMD/PD08 MCS_CLK/PD09 MCS_D0/PD10 I2C_SDA/PD23 I2C_SCK/PD24 PWM2/UART0_TDX PWM3/UART0_RDX CS1_N/GPB25 CS2_N/GPB26 WAIT_N/GPC27 FRB_N/GPC30 FRE_N/GPC28 FWE_N/GPC29 A15/CL/GPB15 A16/AL/GPB16 A18/PWM5/GPD28 D7/GPA7 D6/GPA6 D5/GPA5 D4/GPA4 D3/GPA3 D2/GPA2 D1/GPA1 D0/GPA0 D15/GPA15 D14/GPA14 D13/GPA13 D12/GPA12 D11/GPA11 D10/GPA10 D9/GPA9
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
EXTAL MSC_CMD MSC_CLK MSC_D0 SDA SCK TXD RXD CS1_N CS2_N SD_CD_N FRB_N FRE_N FW E_N NF_CLE NF_ALE D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 TCK_F
C6
22pF
DP0 DM0
DP0 DM0
C
SCK SDA LCD_D14 LCD_D15
TDO_F TMS_F TDI_F IRQ_F
1
J15 UBOOT
1 2
HEADER 2 D8
GND
GND
A3 VDDCORE A2 A1 A0 A10
B
LCD_D[0..17]
A9 VDDCORE A8
LCD_D0
GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
B
DCS0_N RAS_N CAS_N RDWR_N WE0_N WE1_N CK0 CKE A12 A11
LCD_CLK
VDDIO
A7 A6 A5 A4 A13 A14
D[0..31] A[0..14]
3.3V 3.3V 3.3V HZ0805C202R-00 L1 VDDADC HZ0805C202R-00 L2 3.3V VDDUSB HZ0805C202R-00 L3 3.3V VDDHP HZ0805C202R-00 L4 1.8V VDDPLL HZ0805C202R-00 L5 1.8V VDDCORE HZ0805C202R-00 L6 3.3V VDDIO C7 100nF RESET_N U12 mic811
4
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2
PB1 RESET
2
VDD
RESET MR GND
3
A
C10 1uF
C11 1uF
C12 10uF
C13 100nF
C14 10uF
C15 10nF
C16 100nF
C17 10uF
C18 10uF
C19 100nF
C20 100nF
C21 100nF
1
1
1
2
A
Dont mount R8, C8, C9 if U12 is mounted. If U12 is not mounted place a 0 ohm resistor between pin 2 and 3 of U12 Designer: Carlos Camargo Title SAKC BOARD: CPU Size Date:
5 4 3 2
License type: CC-BY-SA Rev 1 Sheet
1
Document Number W ednesday, July 28, 2010 1 of 7
5
4
3
2
1
U9
GPIO46 GPIO47 GPIO29 GPIO31 GPIO32 GPIO33 GPIO34 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO46 GPIO47 GPIO48 GPIO49 GPIO50 GPIO51 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57
RXDF TXDF A6 A7 A8
D
D
A4 A5 D7 D6 D5 D4 D3 D2 D1 D0 ADC_EOC ADC_SCLK ADC_SDIN ADC_SDOUT ADC_CS ADC_CSTART DIG23 DIG22 DIG21 DIG20 DIG19 OSC_XM DIG18 DIG17 DIG16 DIG15 DIG14
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 DIGIN1 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 DIGIN2 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28
2 3 4 5 9 10 11 12 13 15 16 17 18 22 23 24 26 27 30 32 33 34 35 36 38 40 41 47 48 49 44 50 39 42 43
IO1P_3 IO1N_3 IO2P_3 IO2N_3 IO3P_3 IO3N_3 IO4P_3 IO4N_3 IP_3 IO5P_3 IO5N_3 IO6P_3 IO6N_3 IO7P_3 IO7N_3 IO1P_2 IO2P_2 IO2N_2 IP/VREF_2 IO3P_2/GCLK12 IO3N_2/GCLK13 IO/D5 IO4P_2/GCLK14 IO4N_2/GCLK15 IO5P_2/GCLK0 IO6P_2/GCLK2 IO6N_2/GCLK3 IO8P_2 IO8N_2 IO9P_2 IO7N_2/DIN/D0 IO9N_2/CCLK IO5N_2/M2/GCLK1 IO/M1 IO7P_2/M0
IO7P_0 IO6N_0/VREF_0 IO6P_0 IO IO5N_0/GCLK11 IO5P_0/GCLK10 IP4N_0/GCLK9 IP4P_0/GCLK8 IO3N_0/GCLK7 IO3P_0/GCLK6 IO2N_0/GCLK5 IO2P_0/GCLK4 IO1N_0 IO1P_0 IO7N_1 IO7P_1 IP/VREF_1 IO6N_1 IO6P_1 IO5N_1 IO5P_1 IO4N_1 IO4P_1 IO3N_1 IO3P_1 IO2N_1 IO2P_1 IO1N_1 IO1P_1 PROG DONE INIT_B IO7N_0/HSWAP VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCO1_3 VCCO2_3 VCCO3_2 VCCO4_2 VCC05_1 VCC06_1 VCC07_0 VCCO8_0 VCCINT4 VCCINT3 VCCINT2 VCCINT1 TDI TCK TDO TMS
98 95 94 92 91 90 89 88 86 85 84 83 79 78 71 70 69 68 67 66 65 63 62 61 60 58 57 54 53 1 51 25 99 100 77 76 75
A9 A11 A12 WE1_N WE0_N RDWR_N A10 A0 A1 A2 A3 IRQ_F DIG13 DIG12 CS2_N DIG11 DIG10 DIG9 DIG8 DIG7 DIG6 DIG5 DIG4 DIG3 DIG2 DIG1 DIG0
XC3SXXXE-VQ100
C
C
2
GND D5 3V3 GND 3V3
3V3 R18 R19 R20 R21 68 68 68 68 TDI_F TCK_F TDO_F TMS_F
7 14 19 29 37 52 59 64 72 81 87 93
8 20 31 45 55 73 82 97
21 46 74 96
3V3
2V5
80 56 28 6
B
R25 1k
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12
1
B
1V2 C45 100n
2V5 C46 100n C47 100n C48 100n
3V3 3V3 Y3 FXO-HC736R-50 50 MHz OSC 3V3 R32 4.7k R33 4.7k C49 100n C50 100n C51 100n C52 100n C33 100n 1V2
GND VCC
1
C35 100NF
4
EN
OUT
3
OSC_XM
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2
2
PB2 I1
2
DIGIN2
DIGIN1 PB3 I2
C34 100n
C43 100n
C44 100n
2
1
A
1
2
A
1
1
Designer: Carlos Camargo Title SAKC BOARD: FPGA Size Date:
5 4 3
License type: CC-BY-SA Rev 1 Sheet 1 of 1
1
Document Number Wednesday, July 28, 2010
2
5
4
3
2
1
3.3V 3.3V U11 12 11 19 15 9 18 17 16 FS nINVCLK EOC nCS nCSTART I/OCLK GND_ADC D_IN D_OUT 20
D D
VADC
ADC_EOC ADC_CS ADC_CSTART ADC_SCLK ADC_SDIN ADC_SDOUT
A0 A1 A2 A3 A4 A5 A6 A7 REF+ REF-
1 2 3 4 5 6 7 8 14 13
ANALOG0 ANALOG1 ANALOG2 ANALOG3 ANALOG4 ANALOG5 ANALOG6 ANALOG7 ADC_VREF
AN_GND
C
C
B
10
TLV1548
L12 HZ0805C202R-00
B
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A
A
Designer: Carlos Camargo Title SAKC BOARD: A/D Converter Size Date:
5 4 3
License Type: CC-BY-SA Rev 1
Document Number Friday, May 14, 2010
2
Sheet
1
1
of
1
5
4
3
2
1
SDRAM
A[0..14] D[0..31]
D
MLC NAND Flash
3.3V U4
D[0..31]
U3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 23 24 25 26 29 30 31 32 33 34 22 35 36 20 21 37 38 15 39 17 18 16 19 40 A0 MT48LC8M16A2 DQ0 A1 DQ1 A2 DQ2 A3 DQ3 A4 DQ4 A5 DQ5 A6 DQ6 A7 DQ7 A8 DQ8 A9 DQ9 A10 DQ10 A11 DQ11 A12 DQ12 DQ13 BA0 DQ14 BA1 DQ15 CKE CLK DQML DQMH CAS RAS WE CS N.C VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VSS VSS VSS VSSQ VSSQ VSSQ VSSQ 2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 1 14 27 3 9 43 49 28 41 54 6 12 46 52 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 3.3V FRB_N
R10 47K FRE_N CS1_N
NF_CLE NF_ALE FWE_N 3.3V
4 5 6 7 8 9 10 14 15 16 17 18 19 12 37 1 2 3 11 20 21 22 23 24
R/B4# R/B3# R/B2# R/B1# RE# CE1# CE2# CE3# CE4# CLE ALE WE# WP# VCC1 VCC2 NC1 NC2 NC3 NC7 NC10 NC11 NC12 NC13 NC14 NAND MLC
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 VSS1 VSS2 NC28 NC27 NC26 NC25 NC24 NC23 NC22 NC21 NC20 NC19 NC18 NC17 NC16 NC15
29 30 31 32 41 42 43 44 13 36 48 47 46 45 40 39 38 35 34 33 28 27 26 25
D0 D1 D2 D3 D4 D5 D6 D7 GND
D
C
C
CKE CK0 WE0_N WE1_N CAS_N RAS_N RDWR_N DCS0_N
B
R12
33
C22 C23 C24 C25 C26 C27 C28
3.3V
0.1uf 0.1uf 0.1uf 0.1uf 0.1uf 0.1uf 0.1uf
C29 10uF
C30 100nF
C31 100nF
B
3.3V
3.3V
3.3V
3.3V
3.3V
100NF R13 47K R14 47K R17 47K R22 47K R23 47K C32 8 7 6 5 4 3 2 1 J1 DAT1 DAT0 Vss Clk Vdd CMD CD/DAT3 DAT2 MICROSD
MSC_D0 MSC_CLK MSC_CMD
A
CARD_DETECT
R15
33
3.3V
CASE1 CASE2 CASE3 COM
CASE1 CASE2 CASE3
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3.3V R16 47K SD_CD_N
A
Designer: Carlos Camargo Title SAKC BOARD: Memory Size A Date:
3
CD
COM
License type: CC-BY-SA
Document Number Friday, May 14, 2010
2
Rev 1
Sheet
2
1
of
7
5
4
5
4
3
2
1
FRP
V1P
V2P
V3P
V4P
VCOM
D
VCOM
V1M
V2M
V3M
V4M
C61 2.2uF/10V
C62 2.2uF/10V
C63 2.2uF/16V
C64 2.2uF/16V
C73 4.7uF/16V L11 PZ1608D221 LCD_CLK LCD_D7 LCD_D6 LCD_D5 RN1 RN2 LCD_D4 LCD_D3 ARZ3216-4-601LCD_D2 LCD_D1 LCD_D0
LCD_DE LCD_SDA LCD_SCL LCD_HSYNC LCD_VSYNC 4 3 2 4 3 2 5 6 7 8 5 6 7 8
C65 4.7uF/6.3V
C
C66 4.7uF/6.3V
C67 4.7uF/10V
C68 4.7uF/16V
LCD_VDD DVDD V1P V1M V2P V2M VINT1 V3P V3M VINT2 VINT3 V4P V4M VGH VGL AGND FRP VCOM VCAC DRV VLED FB VCOM J20
5 4 3
C69 4.7uF/25V
B
C70 4.7uF/10V
C71 4.7uF/25V
C72 4.7uF/16V
L14 HZ0805C202R-00 AGND
A
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 HEADER 40
D
LCD_VDD
L10 HZ0805C202R-00 3.3V LCD_VDD C59 100nF C1 C2 MSCD104H DRV Q1 TM2302N C74 10uF/16V R35 1Meg C75 100n R36 30
B
DVDD
VINT1
VINT2
L13 PI0302-4R7M 4.7uH D10 VLED
1
C
VINT3
VCAC
VGH
VGL
1
FB
Title Size Date:
2
SAKC BOARD: LCD License type: CC-BY-SA Designer: Carlos Camargo Document Number Thursday, July 29, 2010 Sheet 4
1
A
Rev 1 7
of
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5
4
3
2
1
3.3V 3.3V C36 3.3V D1 18 19 100n 2
3.3V
D
D
GND
VCC
C38 100n R30 1K
2 4
C37 V+ 3 C39 V7
R28 4.7K 100n
R27 4.7K SCK SDA
C1+ C1C2+ C2T1IN T2IN R1OUT R2OUT EN
1
SCK SDA
R29 100k
C
C40 100n
5 6
100n
TX1 RX1 SDA 3.3V
1 2 3 4
1 2 3 4
RX2 TX2 SCK GND
C
TXDF TXD RXDF RXD VAL_RS232
13 12 15 10 1 14
T1OUT T2OUT R1IN R2IN INVALID FORCEOFF
17 8 16 9 11 20
TX2 TX1 RX2 RX1 J8 L7 6 7 8 9 1 2 3 4 5 DM0 DP0
J6
J7
HZ0805C202R-00 USB_V DM0 DP0
B
FORCEON U6
B
C55 100n
MAX3223ECAP
3.3V
L9 HZ0805C202R-00 UX60SC-MB-5ST
ZX62D-B-5P8
Designer: Carlos Camargo Title
A
SAKC BOARD: UART/USB/I2C Size Date:
5 4 3
License type: CC-BY-SA Rev 1 Sheet 5
1
A
Document Number Wednesday, July 28, 2010
2
of
7
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5
4
3
2
1
U7
D
U8 3V3 OUT OUTT 2 4 C41 100n 1.8V 1.8V BAT_V 3 IN OUT OUTT LT1117CST-3.3 2 4 C42 100n 3.3V 3.3V BAT_V 3
U10 1V2 IN OUT OUTT LT1117CST-1.8 2 4 C57 100n 1.2V 1.2V
3.3V
D
BAT_V
3
IN
2 D7 LT1117CST-1.8 1 R31 1k BAT_V C53 100n
C
J11 C56 10uF C54 100n
J12
J13
J14
C
HOLE 1 HOLE 2 HOLE 3 HOLE 4
J17
J18 VRTC
3.3V 1 2 3
UF2 VIN GND VOUT VEN PG 2.5V 5 4 2V5 C60 100n
1 2 3
BAT_V
1 2
USB_V BAT_V
3.3V
D8 MSCD104H R34 1k
LP3988IMF-2.5/MIC5205-2.5YM5TR HEADER 2 D9 MSCD104H
HEADER 3
B
B
BT1 BATTERY HB414_IV01E
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A
A
Designer: Carlos Camargo Title SAKC BOARD: Power Supply Size Date:
5 4 3
License Type: CC-BY-SA Rev 1
Document Number Thursday, July 29, 2010
2
Sheet
6
1
of
7
5
4
3
2
1
J19
D
J16
ADIN1 L-HPO R-LINEIN MICIN
2 4 6 8
1 3 5 7
ADIN0 R-HPO L-LINEIN
HEADER 4X2
C
DIG13 DIG11 DIG9 DIG7 DIG5 DIG3 DIG1 DIG14 DIG16 DIG18 DIG20 DIG22 ADC_VREF ANALOG7 ANALOG5 ANALOG3 ANALOG1 AN_GND
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
DIG12 DIG10 DIG8 DIG6 DIG4 DIG2 DIG0 DIG15 DIG17 DIG19 DIG21 DIG23 3.3V 3.3V ANALOG6 ANALOG4 ANALOG2 ANALOG0 AN_GND
D
C
HEADER 20X2
B B
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Designer: Carlos Camargo Title
A
SAKC BOARD: Connectors Size Date:
5 4
License Type: CC-BY-SA Rev 1 Sheet
2
A
Document Number Friday, May 14, 2010
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